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IJSTR >> Volume 9 - Issue 3, March 2020 Edition



International Journal of Scientific & Technology Research  
International Journal of Scientific & Technology Research

Website: http://www.ijstr.org

ISSN 2277-8616



Analysis And Design Of Fir Filter Using Modified Carry Look Ahead Multiplier

[Full Text]

 

AUTHOR(S)

S. Dhanasekaran, T.Thamaraimanalan, V.Anandkumar , A.Manikandan

 

KEYWORDS

Carry Look Ahead Adder, FIR Filter, Multiplier, Digital Signal Processing

 

ABSTRACT

The dynamic growth in portable multimedia devices and communication system has increased the demand for area and power efficient high-speed Digital Signal Processing (DSP) system. The Finite Impulse Response (FIR) Filter is the important component for designing an efficient digital signal processing system. Usage of digital Finite Impulse Response (FIR) filter is one of the prime block in DSP. Digital multipliers and adders are the most critical arithmetic functional units in FIR filters and also decides the performance of whole system. Thus, the low power system design has become a major performance goal. This paper proposes an FIR filter which is designed using Carry-Look ahead adder and multiplier. Where the multiplier is proposed by internal circuit of Modified Carry Look ahead Adder. Carry-Look ahead Adder (CLA) is used for addition operation which uses fastest carry generation technique to increases the speed by reducing the time required to fix carry bits and multiplier performs multiplication process in a hierarchical manner. Thus, the proposed method can minimize the active power and delay of the FIR filter. The tentative results shows that the FIR filter using proposed multiplier method achieves less amount of delay and power reduction compared to conventional method. The proposed FIR filter is programmed using Verilog code and was synthesized and implemented using Xilinx ISE 14.7 tool. and the power is analyzed using Xpower analyzer.

 

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